Physical Design Engineer
About the Team OpenAI’s Hardware team designs the custom silicon that powers the world’s most advanced AI systems. From system-level architecture to custom circuit implementations, we partner closely with model and infrastructure teams to deliver performance, power, and efficiency breakthroughs across all layers of the
What this role actually needs.
Physical Design Engineer at OpenAI in San Francisco. UpJobz keeps this listing high-signal for applicants targeting serious high-tech roles across the United States, Canada, and Mexico. About the Team OpenAI’s Hardware team designs the custom silicon that powers the world’s most advanced AI systems. From system-level architecture to custom circuit implementations, we partner closely with model and infrastructure teams to deliver performance, power, and efficiency breakthroughs across all layers of the
Day-to-day expectations
A clear list of the work this role is designed to cover.
- Develop, build and own tools, flows and methodologies for physical implementation
- Own physical implementation of floorplan blocks from floorplanning to final signoff
- Collaborate with RTL designers to drive optimal block implementation solutions
- Analyze and optimize design for timing, power, and area trade-offs, working in collaboration with EDA vendors and ASIC partners
- BS w/ 4+ or MS with 2+ years or PhD with 0-1 year(s) of relevant industry experience in physical design and methodology development
- Demonstrated success in taping out complex silicon designs
What a strong candidate brings
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- BS w/ 4+ or MS with 2+ years or PhD with 0-1 year(s) of relevant industry experience in physical design and methodology development
- Demonstrated success in taping out complex silicon designs
- Hands-on experience with block physical implementation and PPA convergence
- Strong coding experience with python, bazel, TCL
- Strong experience building physical design tools, flows and methodologies
- Strong understanding of microarchitecture, RTL design, physical design, circuit design, physical verification and timing closure.
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